AMDの次世代CPUについて語ろう 4次世代
>>194
もし受け売りなら原典を示すのが礼儀というモノす。
http://www.anandtech.com/cpuchipsets/showdoc.aspx?i=2748&p=6
---------------------------
Finally, there is also a lot of headroom for increasing integer performance. The fact that Loads
can hardly be reordered has been a known weak point since the early K7 days. In fact, we know
that engineers at AMD were well aware of it then, and it is surprising that AMD didn't really fix
this in the K8 architecture. Allowing a much more flexible reordering of Loads - even without
memory disambiguation - would give a very healthy boost to IPC (5% and more). It is one of the
main reasons why the P-M can beat the Athlon 64 clock-for-clock in certain applications.
Those are just a few examples that are well known. It is very likely that there are numerous
other possible improvements that could take the K8 architecture much further.
---------------------------
もし受け売りなら原典を示すのが礼儀というモノす。
http://www.anandtech.com/cpuchipsets/showdoc.aspx?i=2748&p=6
---------------------------
Finally, there is also a lot of headroom for increasing integer performance. The fact that Loads
can hardly be reordered has been a known weak point since the early K7 days. In fact, we know
that engineers at AMD were well aware of it then, and it is surprising that AMD didn't really fix
this in the K8 architecture. Allowing a much more flexible reordering of Loads - even without
memory disambiguation - would give a very healthy boost to IPC (5% and more). It is one of the
main reasons why the P-M can beat the Athlon 64 clock-for-clock in certain applications.
Those are just a few examples that are well known. It is very likely that there are numerous
other possible improvements that could take the K8 architecture much further.
---------------------------
|
|
|